BooksBook ChaptersJournal ArticlesConference PapersSelected Citations

Downloadable publications are listed here in reverse-chronological order and are also available grouped by research topic.

Books

  1. R. F. DeMara, editor, Advances in Evolvable Hardware, Studies in Computational Intelligence forthcoming, Springer-Verlag, 2005.
  2. T. Plaks, R. F. DeMara, M. Gokhale, S. Guccione, M. Platzner, G. Smit, M. Wirthlin, editors, Proceedings of the Fifth International Conference on Engineering of Reconfigurable Systems and Algorithms, CSREA Press, 2005.
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Book Chapters

  1. J. D. Lohn, G. Larchev, and R. F. DeMara, “Fault Recovery and Correctness Evaluation of Sequential Circuits using Genetic Algorithms,” in Advances in Machine Learning, Springer Verlag Heidelberg (to appear).
    [abstract] [pdf] [bibtex]
  2. J. Castro, J. Secretan, M. Georgiopoulos, R. F. DeMara, G. Anagnostopoulos, and A. Gonzalez, “Pipelining Fuzzy ARTMAP without Match-Tracking,” in Intelligent Engineering Systems through Artificial Neural Networks, Vol. 14, ASME Press, 2004, ISBN: 0-791-80228-0, pp. 100 – 106.
    [abstract] [pdf] [bibtex]
  3. J. D. Lohn, G. Larchev, and R. F. DeMara, “A Genetic Representation for Evolutionary Fault Recovery in Virtex FPGAs,” in Lecture Notes in Computer Science, Springer-Verlag Heidelberg, 2003, ISSN: 0302-9743, pp. 47 – 56.
    [abstract] [pdf] [bibtex]
  4. A. E. Henninger, A. J. Gonzalez, M. Georgiopoulos, and R. F. DeMara, “A Connectionist-Symbolic Approach to Modeling Agents: Neural Networks Grouped by Contexts,” in Lecture Notes in Computer Science, Springer Verlag, 2001, ISBN: 3-540-42379-6, pp. 198 – 209.
    [abstract] [pdf] [doc] [bibtex]
  5. R. F. DeMara, Contributor, Comprehensive Dictionary of Electrical Engineering, P. A. Laplante, Editor-in-chief, IEEE Press, 1999, ISBN: 0-8493-3128-5.
    [topics] [terms] [contributors]
  6. S. H. Chung, D. I. Moldovan, and R. F. DeMara, “Massively Parallel Speech Understanding,” in Massively Parallel Artificial Intelligence, MIT Press, 1993, J. A. Hendler and H. Kitano, Ed., ISBN: 0-262-61102-3, pp. 138 – 170.
    [abstract] [pdf] [bibtex]
  7. R. F. DeMara, “Software Design Guidance Document: Content and Format,” IBM FSD Systems Engineering Standards Manual, IBM Corporate Practice CP-2507-014, December 1988, pp. 1 – 18.
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Journal Articles

  1. J. Huang, M. Parris, J. Lee, and R. F. DeMara, "Scalable FPGA-based Architecture for DCT Computation Using Dynamic Partial Reconfiguration," accepted to ACM Transactions on Embedded Computing Systems.
    [abstract] [pdf] [doc] [bibtex]
  2. M. Georgiopoulos, R. F. DeMara, A. J. Gonzalez, A. S. Wu, M. Mollaghasemi, E. Gelenbe, M. Kysilka, J. Secretan, C. A. Sharma, and A. J. Alnsour, "A Sustainable Model for Integrating Current Topics in Machine Learning Research into the Undergraduate Curriculum," accepted to IEEE Transactions on Education.
    [abstract] [pdf] [doc] [bibtex]
  3. R. F. DeMara, K. Zhang, and C. A. Sharma "Autonomic Fault-Handling and Refurbishment Using Throughput-Driven Assessment," accepted with revision to Applied Soft Computing.
    [abstract] [pdf] [doc] [bibtex]
  4. Leon-Barth and R. F. DeMara, "Network Communication Effects Simulator Evaluation Scenarios for JTRS and WIN-T," MSIAC Modeling and Simulation Journal, Vol. 2, No. 10, July, 2008, pp. 11 – 20.
    [abstract] [pdf] [doc] [bibtex]
  5. Rashad S. Oreifej and Ronald F. DeMara, “Intrinsic Evolvable Hardware Platform for Digital Circuit Design and Repair Using Genetic Algorithms,” submitted to Applied Soft Computing Journal (ASC) - Elsevier. November,2009.
    [abstract] [pdf] [doc] [bibtex]
  6. Carthik A. Sharma, Ronald F. DeMara and Alireza Sarvi, “Self-Healing Reconfigurable Logic using Autonomous Group Testing,” submitted to ACM Transactions on Autonomous and Adaptive Systems (TAAS) of Special Issue on Organic Computing. May,2007.
    [abstract] [pdf] [doc] [bibtex]
  7. Kening Zhang, Jaafar Alghazo, and R. F. DeMara, “Organic Embedded Architecture for Sustainable FPGA Soft-Core Processors,” submitted to ACM Transactions on Autonomous and Adaptive Systems (TAAS) of Special Issue on Organic Computing. May,2007.
    [abstract] [pdf] [doc] [bibtex]
  8. W. Kuang, P. Zhao, J.S. Yuan, R. F. DeMara, “Design of Asynchronous Circuits for High Soft Error Tolerance in Deep Submicron CMOS Circuits,” accepted to IEEE Transactions on Very Large Scale Integration (VLSI) Systems on December 8,2008.
    [abstract] [pdf] [doc] [bibtex]
  9. A. J. Gonzalez, A. E. Henninger, M. Georgiopoulos, and R. F. DeMara, “Maintaining Coherence among Entities’ States in a Distributed Multi-Agent System,” accepted to Journal of Defense Modeling and Simulation.
    [abstract] [pdf] [doc] [bibtex]
  10. H. Tan, R. F. DeMara, “A Multi-layer Framework Supporting Autonomous Runtime Partial Reconfiguration,” accepted to IEEE Transactions on Very Large Scale Integration (VLSI) Systems on 17 July 2007.
    [abstract] [pdf] [doc] [bibtex]
  11. R. F. DeMara, Y. Tseng, and A. Ejnioui, “Tiered Algorithm for Distributed Process Termination Detection,” accepted to IEEE Transactions on Parallel and Distributed Systems on December 14,2006.
    [abstract] [pdf] [bibtex]
  12. A. J. Rocke and R. F. DeMara, and S. Y. Foo, “Evaluation of Distributed File Integrity Analyzers in the Presence of Tampering,” International Journal of Network Security, Vol. 5, No. 1, pp.21-31, July, 2007.
    [abstract] [pdf] [bibtex]
  13. T. Kocak, G. R. Harris, R. F. DeMara, “Self-timed Architecture for Masked Successive Approximation Analog-to-Digital Conversion,” Journal of Circuits, Systems, and Computers, Vol. 16, No. 1, February 2007.
    [abstract] [pdf] [bibtex]
  14. A. J. Rocke and R. F. DeMara, “A Centralized Control and Dynamic Dispatch Architecture for File Integrity Analysis,” Journal of Systemics, Cybernetics and Informatics, Vol. 4, No. 6, January, 2007, pp. 1 – 7.
    [abstract] [pdf] [bibtex]
  15. J. Castro, J. Secretan, M. Georgiopoulos, R. F. DeMara, G. Anagnostopoulos, and A. J. Gonzalez, “Pipelining of Fuzzy-ARTMAP without Match-Tracking: Correctness, Performance Bound, and Beowulf Evaluation,” Neural Networks, Vol. 20, No. 1, January, 2007, pp. 109 – 128.
    [abstract] [pdf] [bibtex]
  16. R. F. DeMara, Y. Tseng, K. Drake, and A. Ejnioui, “Capability Classes of Barrier Synchronization Techniques,” International Journal of Computers and Applications, Vol. 28, No. 4, December, 2006, pp. 342 – 349.
    [abstract] [pdf] [bibtex]
  17. C. Leon-Barth, R. F. DeMara, and H. Marshall, “Communication Modeling of Training and Simulation Traffic in a Tactical Internet,” MSIAC Online Modeling and Simulation Journal, Vol. 1, No. 3, August, 2006, pp. 1 – 7.
    [abstract] [pdf] [bibtex]
  18. J. Di, J. S. Yuan, and R. F. DeMara, “Improving Power-awareness of Pipelined Array Multipliers using 2-Dimensional Pipeline Gating and its Application to FIR Design,” Integration, the VLSI Journal, Vol. 39, No. 2, March, 2006, pp. 90-112.
    [abstract] [pdf] [doc] [bibtex]
  19. A. J. Rocke and R. F. DeMara, “Mitigation of Insider Risks using Distributed Agent Detection, Filtering and Signaling,” International Journal of Network Security Vol. 2, No. 2, March, 2006, pp. 141 – 149.
    [abstract] [pdf] [bibtex]
  20. H. Fernlund, A. J. Gonzalez, R. F. DeMara, and M. Georgiopoulos, “Learning Tactical Human Behavior through Observation of a Human Actor,” IEEE Transactions on Systems, Man and Cybernetics, Vol. 36, No. 1, February, 2006, pp. 128 – 140.
    [abstract] [pdf] [bibtex]
  21. A. J. Rocke and R. F. DeMara, “A Collaborative Object Notification Framework for Insider Defense,” Journal of Autonomous Agents and Multi-Agent Systems, Vol. 12, No. 1, January, 2006, pp. 93 – 114.
    [abstract] [pdf] [bibtex]
  22. J. Castro, M. Georgiopoulos, J. Secretan, R. F. DeMara, G. Anagnostopoulos, and A. J. Gonzalez, “Parallelization of Fuzzy ARTMAP to Improve its Convergence Speed: The Network Partitioning Approach and the Data Partitioning Approach,” Nonlinear Analysis: Theory, Methods, and Applications, Vol. 63, No. 5 - 7, November - December, 2005, pp. 877-889.
    [abstract] [pdf] [doc] [bibtex]
  23. J. Castro, M. Georgiopoulos, and R. F. DeMara, “Data Partitioning using the Hilbert Space Filling Curves: Effect on the Speed of Convergence of Fuzzy ARTMAP for Large Database Problems,” Neural Networks Vol. 18, No. 7, September, 2005, pp. 967-984.
    [abstract] [pdf] [bibtex]
  24. H. A. Bahr and R. F. DeMara, “OTBSAF Scalability on Pentium III/4 and Athlon 64/XP3000 Architectures,” in MSIAC Modeling and Simulation Journal, on February 9, 2005, Vol.6, No. 3, March, 2005, pp. 1 - 4.
    [abstract] [pdf] [doc] [bibtex]
  25. H. A. Bahr and R. F. DeMara, “Data Bandwidth Reduction for Embedded Simulation using Concurrent Behavior Models,” submitted to Simulation on December 31, 2004.
    [abstract] [pdf] [bibtex]
  26. J. Vargas, R. F. DeMara, A. J. Gonzalez, M. Georgiopoulos, and H. Marshall, “PDU Bundling and Replication for Reduction of Distributed Simulation Communication Traffic,” Journal of Defense Modeling and Simulation, Vol. 1, No. 3, August, 2004, pp. 171 – 183.
    [abstract] [pdf] [doc] [bibtex]
  27. A. J. Gonzalez, W. J. Gerber, R. F. DeMara, and M. Georgiopoulos, “Context-driven Near-term Intention Recognition,” Journal of Defense Modeling and Simulation, Vol. 1, No. 3, August, 2004, pp. 153 – 170.
    [abstract] [pdf] [doc] [bibtex]
  28. D. S. Carstens, P. McCauley-Bell, L. C. Malone, and R. F. DeMara, “Evaluation of the Human Impact of Password Authentication Practices on Information Security,” Informing Science Journal, Vol. 7, No. 1, August, 2004, pp. 67 – 85.
    [abstract] [pdf] [doc] [bibtex]
  29. S. C. Smith, R. F. DeMara, J. S. Yuan, D. Ferguson, and D. Lamb, “Optimization of NULL Convention Self-timed Circuits,” Integration, The VLSI Journal, Vol. 37, No. 3, August, 2004, pp. 135 – 165.
    [abstract] [pdf] [bibtex]
  30. H. A. Bahr and R. F. DeMara, “Smart Priority Queue Algorithms for Self-optimizing Event Storage,” Simulation Modeling Practice and Theory, Vol. 12, No. 1, April, 2004, pp. 15 – 40.
    [abstract] [pdf] [bibtex]
  31. R. F. DeMara and A. J. Rocke, “Mitigation of Network Tampering Using Dynamic Dispatch of Mobile Agents,” Computers and Security, Vol. 23, No. 1, February, 2004, pp. 31 – 42.
    [abstract] [pdf] [bibtex]
  32. Y. Tseng, R. F. DeMara, and P. Wilder, “Distributed-Sum Termination Detection Supporting Multithreaded Execution,” Parallel Computing, Vol. 29, No. 7, July, 2003, pp. 953 – 968.
    [abstract] [pdf] [bibtex]
  33. W. Kuang, J. S. Yuan, R. F. DeMara, M. Hagedorn, and K. Fant, “Performance Analysis and Optimization of NCL Self-timed Rings,” IEE Proceedings on Circuits, Devices, and Systems, Vol. 150, No. 3, June, 2003, pp. 167 – 172.
    [abstract] [pdf] [doc] [bibtex]
  34. R. C. Watkins, K. M. Reynolds, R. F. DeMara, M. Georgiopoulos, A. J. Gonzalez, and R. Eaglin, “Exploring Data Mining Technologies as Tools to Investigate Money Laundering,” Journal of Policing Practice and Research: An International Journal, Vol. 4, No. 2, January, 2003, pp. 163 – 178.
    [abstract] [pdf] [doc] [bibtex]
  35. S. C. Smith, R. F. DeMara, J. S. Yuan, M. Hagedorn, and D. Ferguson, “NULL Convention Multiply and Accumulate Unit with Conditional Rounding, Scaling, and Saturation,” Journal of Systems Architecture, Vol. 47, No. 12, June, 2002, pp. 977 – 998.
    [abstract] [pdf] [bibtex]
  36. R. F. DeMara and P. J. Wilder, “A Taxonomy of High Performance Computer Architectures for Uniform Treatment of Multiprocessor Designs,” Computers in Education Journal, Vol. XI, No. 4, October – December, 2001, pp. 45 – 52.
    [abstract] [pdf] [doc] [bibtex]
  37. S. C. Smith, R. F. DeMara, J. S. Yuan, M. Hagedorn, and D. Ferguson, “Delay-Insensitive Gate-level Pipelining,” Integration, The VLSI Journal, Vol. 30, No. 2, November, 2001, pp. 103 – 131.
    [abstract] [pdf] [bibtex]
  38. B. S. Motlagh and R. F. DeMara, “Performance of Scalable Shared-Memory Architectures,” Journal of Systems, Circuits, and Computers, Vol. 10, No. 1, February, 2000, pp. 1 – 20.
    [abstract] [pdf] [bibtex]
  39. P. J. Wilder and R. F. DeMara, “Rapid-Prototype Microprocessor-based Parallel Architectures,” Journal of Engineering Technology, Vol. 16, No. 1, March, 1999, pp. 24 – 31.
    [abstract] [pdf] [bibtex]
  40. R. F. DeMara, R. Mercer, and M. Ebel, “Helical Latch for Scalable Boolean Logic Operations,” Nanotechnology, Vol. 5, No. 3, July, 1994, pp. 137 – 156.
    [abstract] [pdf] [bibtex]
  41. S. H. Chung, D. I. Moldovan, and R. F. DeMara, “A Parallel Computational Model for Integrated Speech and Natural Language Understanding,” IEEE Transactions on Computers, Vol. 42, No. 10, October, 1993, pp. 1171 – 1183
    [abstract] [pdf] [bibtex]
  42. R. F. DeMara and D. I. Moldovan, “The SNAP-1 Parallel AI Prototype,” IEEE Transactions on Parallel and Distributed Systems, Vol. 4, No. 8, August, 1993, pp. 841 – 854.
    [abstract] [pdf] [bibtex]
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Conference Proceedings

  1. D. Workman, R. F. DeMara, K. Sundaram, D. Turgut, I. Batarseh, and S. Bethel, "Preparing for the Accreditation Visit," presented at ABET Best Assessment Processes Symposium, Indianapolis, IN, U.S.A, April 3 – 4, 2009.
    [abstract] [pdf] [doc] [ppt] [bibtex]
  2. V. Hung, A. Gonzalez, and R. F. DeMara, "Towards A Context-Based Dialog Management Layer for Expert Systems," in Proceedings of the International Conference on Information, Process, and Knowledge Management, Cancun, Mexico, February 1 – 7, 2009.
    [abstract] [pdf] [doc] [ppt] [bibtex]
  3. R. F. DeMara, A. J. Gonzalez, S. Jones, A. Johnson, J. Leigh, V. Hung, C. Leon-Barth, R. A. Dookhoo, L. Renambot, S. Lee, and G. Carlson, "Towards Interactive Training with an Avatar-based Human-Computer Interface", in Proceedings of the 2008 Interservice/Industry Training Systems and Education Conference (I/ITSEC'08), Orlando, FL, U.S.A., December 1 – 4, 2008.
    [abstract] [pdf] [doc] [ppt] [bibtex]
  4. A. Sarvi, C. A. Sharma, R. F. DeMara, "BIST-Based Group Testing For Diagnosis of Embedded FPGA Cores," in Proceedings of the International Conference on Embedded Systems and Applications (ESA'08),  Las Vegas, Nevada, U.S.A., July 14 – 17, 2008.
    [abstract] [pdf] [bibtex]
  5. J. Huang, M. Parris, J. Lee, and R. F. DeMara, "Scalable FPGA Architecture for DCT Computation using Dynamic Partial Reconfiguration," in International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA'08), Las Vegas, U.S.A., July 14-17, 2008.
    [abstract] [pdf] [doc] [ppt] [bibtex]
  6. K. Zhang, R. F. DeMara, and J. Alghazo, "FPGA Self-Repair using an Organic Embedded System Architecture," in Proceedings of the International Workshop on Dependable Circuits Design (DECIDE'07), Buenos Aires, Argentina, December 6-7, 2007.
    [abstract] [pdf] [doc] [ppt] [bibtex]
  7. R. S. Oreifej, R. N. Al-Haddad, H. Tan, R. F. DeMara, "Layered Approach To Intrinsic Evolvable Hardware Using Direct Bitstream Manipulation Of Virtex II Pro Device," "Best paper of session and nominated best of conference" in Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL'07), Amsterdam, Netherlands, 27-29 August 2007, 2007.
    [abstract] [pdf] [doc] [ppt][bibtex]
  8. R. N. Al-Haddad, C. A. Sharma, R. F. DeMara, "Performance Evaluation of Two Allocation Schemes for Combinatorial Group Testing Fault Isolation," in Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms ERSA '07,, Las Vegas, Nevada, U.S.A, June 25 – 28, 2007.
    [abstract] [4-page version pdf] [4-page version doc] [5-page version pdf] [5-page version doc] [ppt] [bibtex]
  9. R. S. Oreifej, C. A. Sharma, R. F. DeMara, "Expediting GA-Based Evolution Using Group Testing Techniques for Reconfigurable Hardware," in Proceedings of the IEEE International Conference on Reconfigurable Computing and FPGAs (Reconfig'06), San Luis Potosi, Mexico, September 20-22, 2006, pp 106-113.
    [abstract] [pdf] [doc] [ppt][bibtex]
  10. H. Tan, R. F. DeMara, “A Physical Resource Management Approach to Minimizing FPGA Partial Reconfiguration Overhead,” in Proceedings of the IEEE International Conference on Reconfigurable Computing and FPGAs (Reconfig’06), San Luis Potosi, Mexico, September 20 – 22, 2006, pp. 86-90.
    [abstract] [pdf] [doc][ppt] [bibtex]
  11. K. Zhang, G. Bedette, R. F. DeMara, "Triple Modular Redundancy with Standby (TMRSB) Supporting Dynamic Resource Reconfiguration," in Proceedings of IEEE AUTOTESTCON 2006, September 18-21, 2006.
    [abstract] [pdf] [doc] [ppt] [bibtex]
  12. H. Tan, R. F. DeMara, A. J. Thakkar, A. Ejnioui and J. D. Sattler, "Complexity and Performance Evaluation of Two Partial Reconfiguration Interfaces on FPGAs: a Case Study," in Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA'06), Las Vegas, Nevada, U.S.A, 2006.
    [abstract] [2-page pdf] [7-page pdf] [2-page doc] [7-page doc] [bibtex]
  13. J. D. Sattler, M. Leftwich, R. F. DeMara, H. Tan, and A. Ejnioui, "Partial Reconfiguration of FPGAs with Software and Hardware Anti-Tamper Considerations," in The proceedings of the 2006 DoD Anti-Tamper Conference (AT'06), April 25-27, 2006, Dayton, OH, U.S.A.
    [abstract] [pdf] [doc] [bibtex]
  14. C. A. Sharma, R. F. DeMara, "A Combinatorial Group Testing Method for FPGA Fault Location", accepted to International Conference on Advances in Computer Science and Technology (ACST 2006), Puerto Vallarta, Mexico, January 23 - 35, 2006
    [abstract] [pdf] [doc][ppt] [bibtex]
  15. C. J. Milliord, C. A. Sharma, R. F. DeMara, "Dynamic Voting Schemes to Enhance Evolutionary Repair in Reconfigurable Logic Devices," in Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig'05), pp. 8.1.1 - 8.1.6, Puebla City, Mexico, September 28 - 30, 2005.
    [abstract][pdf] [doc] [ppt] [bibtex]
  16. K. Zhang, R. F. DeMara, C. A. Sharma, “Consensus-based Evaluation for Fault Isolation and On-line Evolutionary Regeneration,” in Proceedings of the International Conference in Evolvable Systems (ICES'05), pp. 12 -24, Barcelona, Spain, September 12 - 14, 2005.
    [abstract] [pdf] [doc] [ppt] [bibtex]
  17. R. F. DeMara and K. Zhang, “Autonomous FPGA Fault Handling through Competitive Runtime Reconfiguration,” in Proceedings of the NASA/DoD Conference on Evolvable Hardware(EH’05), Washington D.C., U.S.A., June 29 – July 1, 2005.
    [abstract] [pdf] [ppt][bibtex]
  18. H. Tan and R. F. DeMara, “A Device-Controlled Dynamic Configuration Framework Supporting Heterogeneous Resource Management,” in Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA’05), Las Vegas, Nevada, U.S.A, June 27 – 30, 2005.
    [abstract] [pdf] [ppt] [bibtex]
  19. R. F. DeMara and C. A. Sharma, “Self-Checking Fault Detection using Discrepancy Mirrors,” in Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA’05), pp. 311-317, Las Vegas, Nevada, U.S.A, June 27 – 30, 2005.
    [abstract] [pdf] [ppt] [bibtex]
  20. A. Ejnioui and R. F. DeMara, “Area Reclamation Metrics for SRAM-based Reconfigurable Device,” in Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA’05), Las Vegas, Nevada, U.S.A, June 27 – 30, 2005.
    [abstract] [pdf] [ppt] [bibtex]
  21. G. Wang, R. F. DeMara and A. J. Rocke, “Mobility-Enhanced File Integrity Analyzer For Networked Environments,” in Proceedings of the 9th World Multi-Conference on Systemics, Cybernetics and Informatics (WMSCI '05), Orlando, FL, July 10 – 13, 2005.
    [abstract] [pdf][pdf presentation] [bibtex]
  22. A. Ejnioui and R. F. DeMara, “FPGA Defragmentation for Sustainable Performance in Reconfigurable Computers,” in Proceedings of the International Symposium on VLSI (ISVLSI’05),Tampa, Florida, U.S.A., May 11 – 12, 2005.
    [abstract] [pdf] [doc] [bibtex]
  23. J. Castro, J. Secretan, M. Georgiopoulos, R. F. DeMara, G. Anagnostopoulos, and A. Gonzalez, “Pipelining Fuzzy ARTMAP without Match-Tracking,” in Proceedings of the 2004 Artificial Neural Networks in Engineering (ANNIE’04) Conference, St. Louis, Missouri, U.S.A., November 7 – 10, 2004.
    [abstract] [pdf] [bibtex]
  24. J. Castro, M. Georgiopoulos, R. F. DeMara and A. J. Gonzalez, “A Data Partitioning Approach to speed up the Fuzzy ARTMAP algorithm using the Hilbert Space-Filling Curve,” in Proceedings of the 2004 International Joint Conference on Neural Networks (IJCNN’04), Budapest, Hungary, July 25 – 29, 2004.
    [abstract] [pdf] [bibtex]
  25. J. Castro, M. Georgiopoulos, J. Secretan, R. F. DeMara, G. Anagnostopoulos, and A. J. Gonzalez, “Parallelization of Fuzzy ARTMAP to Improve its Convergence Speed: The Boxing Approach and the Data Partitioning Approach,” in Proceedings of the Fourth World Congress of Nonlinear Analysts (WCNA’04), Orlando, Florida, U.S.A., June 30 – July 7, 2004.
    [abstract] [pdf] [doc] [bibtex]
  26. R. F. DeMara, A. Kejriwal, and J. R. Seeber, “Feedback Techniques for Dual-Rail Self-Timed Circuits,” in Proceedings of the 2004 International Conference on VLSI (VLSI-04), pp. 458 – 464, Las Vegas, Nevada, U.S.A., June 21 – 24, 2004.
    [abstract] [pdf] [doc] [ppt] [bibtex]
  27. M. Georgiopoulos, J. Castro, E. Gelenbe, R. F. DeMara, A. J. Gonzalez, M. Kysilka, M. Mollaghasemi, and A. S. Wu, "CRCD Experiences at the University of Central Florida: An NSF Project," in Proceedings of the 2004 American Society for Engineering Education Annual Conference and Exposition (ASEE’04), pp. 2432: 1 – 23, Salt Lake City, Utah, U.S.A., June 20 – 23, 2004.
    [abstract] [pdf] [bibtex]
  28. J. Castro, M. Georgiopoulos, R. F. DeMara, and A. J. Gonzalez, “A Partitioned Fuzzy ARTMAP Implementation for Fast Processing of Large Databases on Sequential Machines,” in Proceedings of the Seventieth International Florida Artificial Intelligence Research Symposium (FLAIRS’04), Miami Beach, Florida, U.S.A., May 17 – 19, 2004.
    [abstract] [pdf] [bibtex]
  29. J. C. Leon-Barth, R. F. DeMara, A. J. Gonzalez, and M. Georgiopoulos, “Bandwidth Optimizations for Integrated Tactical and Training Networks,” in Proceedings of the Second Swedish American Workshop on Modeling and Simulation (SAWMAS’04), pp. 24 – 31, Cocoa Beach, Florida, U.S.A., February 1 – 2, 2004.
    [abstract] [pdf] [doc] [bibtex]
  30. J. J. Vargas, R. F. DeMara, A. J. Gonzalez, and M. Georgiopoulos, “Bandwidth Analysis of a Simulated Computer Network Executing OTB,” in Proceedings of the Second Swedish American Workshop on Modeling and Simulation (SAWMAS’04), pp. 201 – 208, Cocoa Beach, Florida, U.S.A., February 1 – 2, 2004.
    [abstract] [pdf] [doc] [bibtex]
  31. M. Georgiopoulos, J. Castro, A. Wu, R. F. DeMara, E. Gelenbe, A. J. Gonzalez, M. Kysilka, and M. Mollaghasemi, “CRCD in Machine Learning at the University of Central Florida: Preliminary Experiences,” in Proceedings of the Eight Annual Conference on Innovation and Technology in Computer Science Education (ITiCSE-2003), pp. 249, Thessaloniki, Greece, June 30 – July 2, 2003.
    [abstract] [pdf] [bibtex]
  32. M. Georgiopoulos, R. F. DeMara, E. Gelenbe, A. Gonzalez, M. Kysilka, M. Mollaghasemi, A. Wu, and I. Russell, “Machine Learning Advances for Engineering and Science Education: A CRCD Experience at the University of Central Florida”, in Proceedings of the Thirteenth International Conference on Artificial Neural Networks (ICANN’03), pp. 465 – 468, Istanbul, Turkey, June 26 – 29, 2003.
    [abstract] [pdf] [bibtex]
  33. M. Georgiopoulos, I. Russell, J. Castro, A. Wu, M. Kysilka, R. F. DeMara, A. Gonzalez, E. Gelenbe, and M. Mollaghasemi, “A CRCD Experience: Integrating Machine Learning Concepts into Introductory Engineering and Science Programming Courses,” in Proceedings of the 2003 American Society for Engineering Education Annual Conference and Exposition (ASEE’03), pp. 1332: 1 – 20, Nashville, Tennessee, U.S.A., June 22 – 25, 2003.
    [abstract] [pdf] [bibtex]
  34. J. D. Lohn, G. Larchev, and R. F. DeMara, “Evolutionary Fault Recovery in a Virtex FPGA Using a Representation that Incorporates Routing,” in Proceedings of the Seventieth International Parallel and Distributed Processing Symposium (IPDPS-2003) – Reconfigurable Architectures Workshop, pp. 172, Nice, France, April 22 – 26, 2003.
    [abstract] [pdf] [bibtex]
  35. J. D. Lohn, G. Larchev, and R. F. DeMara, “A Genetic Representation for Evolutionary Fault Recovery in Virtex FPGAs,” in Proceedings of the Fifth International Conference on Evolvable Systems (ICES’03), pp. 47 – 56, Trondheim, Norway, March 17 – 20, 2003.
    [abstract] [pdf] [bibtex]
  36. J. Di, J. S. Yuan, and R. DeMara, “High Throughput Power-aware FIR Filter Design based on Fine-grain Pipeline Multipliers and Adders,” in Proceedings of the 2003 IEEE Annual Symposium on VLSI (ISVLSI’03), pp. 260 – 261, Tampa, Florida, U.S.A., February 20 – 21, 2003.
    [abstract] [pdf] [bibtex]
  37. Y. Tseng and R. F. DeMara, “Communication Pattern based Methodology for Performance Analysis of Termination Detection Schemes,” in Proceedings of the Ninth International Conference on Parallel and Distributed Systems (ICPADS’02), pp. 535 – 541, Chungli Taoyuan, Taiwan, December 17 – 20, 2002.
    [abstract] [pdf] [bibtex]
  38. J. D. Lohn and R. F. DeMara, “A Co-evolutionary Genetic Algorithm for Autonomous Fault-Handling in FPGAs,” in Proceedings of the Sixth International Conference on Military and Aerospace Programmable Logic Devices (MAPLD-2002), Laurel, Maryland, U.S.A., September 10 – 12, 2002.
    [abstract] [pdf] [bibtex]
  39. A. E. Henninger, A. J. Gonzalez, M. Georgiopoulos, and R. F. DeMara, “A Connectionist-Symbolic Approach to Modeling Agents: Neural Networks Grouped by Contexts,” in Proceedings of the Third International and Interdisciplinary Conference on Modeling and Using Context (CONTEXT’01), pp. 198 – 209, Dundee Scotland, July 26 – 29, 2001.
    [abstract] [pdf] [doc] [bibtex]
  40. A. E. Henninger, A. J. Gonzalez, M. Georgiopoulos, and R. F. DeMara, “Developing and Validating Human Behavioral Models through Learning By Observation,” in Proceedings of the 2001 World Multiconference on Systemics, Cybernetics and Informatics: Concepts and Applications (Part III), Orlando, FL, U.S.A., July 22 – 25, 2001.
    [abstract] [pdf] [bibtex]
  41. S. C. Smith, R. F. DeMara, J. S. Yuan, M. Hagedorn, and D. Ferguson, “Speedup of Delay-Insensitive Digital Systems Using NULL Cycle Reduction,” in Proceedings of the 2001 International Workshop on Logic and Synthesis (IWLS’01), Granlibakken, California, U.S.A., pp. 185 – 189, June 12 – 15, 2001.
    [abstract] [pdf] [bibtex]
  42. A. E. Henninger, A. J. Gonzalez, M. Georgiopoulos, and R. F. DeMara, “The Limitations of Static Performance Metrics for Dynamic Tasks Learned Through Observation,” in Proceedings of the Tenth Conference on Computer Generated Forces and Behavioral Representation (CGF-BR’01), pp. 147 – 154, Norfolk, Virginia, U.S.A., May 14 – 17, 2001.
    [abstract] [pdf] [doc] [bibtex]
  43. A. E. Henninger, A. J. Gonzalez, M. Georgiopoulos, and R. F. DeMara, “Human Performance Models for Embedded Training: A Novel Approach to Entity State Synchronization,” in Proceedings of the 2001 Advanced Simulation Technology Conference (ASTC-2001) – Symposium on Military, Government, and Aerospace Simulation, Seattle, Washington, U.S.A., April 22 – 26, 2001.
    [abstract] [pdf] [bibtex]
  44. A. E. Henninger, A. J. Gonzalez, W. Gerber, M. Georgiopoulos, and R. F. DeMara, “On the Fidelity of SAFs: Can Performance Data Help?” in Proceedings of the 2000 Interservice/Industry Training, Simulation and Education Conference (I/ITSEC-2000), pp. 147 – 154, Orlando, Florida, U.S.A., November 27 – 30, 2000.
    [abstract] [pdf] [bibtex]
  45. A. Gallagher, A. J. Gonzalez, and R. F. DeMara, “Modeling Platform Behaviors Under Degraded States Using Context-Based Reasoning,” in Proceedings of the 2000 Interservice/Industry Training, Simulation and Education Conference (I/ITSEC-2000), Orlando, Florida, U.S.A., November 27 – 30, 2000.
    [abstract] [pdf] [doc] [bibtex]
  46. W. Kuang, J. S. Yuan, R. F. DeMara, D. Ferguson, and M. Hagedorn, “A Delay-insensitive FIR Filter for DSP Applications,” in Proceedings of the Ninth Annual NASA Symposium on VLSI Design, pp 2.2.1 – 2.2.7, Albuquerque, New Mexico, U.S.A., November 8 – 9, 2000.
    [abstract] [pdf] [bibtex]
  47. N. Weng, J. S. Yuan, R. F. DeMara, D. Ferguson, and M. Hagedorn, “Glitch Power Reduction for Low Power IC Design,” in Proceedings of the Ninth Annual NASA Symposium on VLSI Design, pp. 7.5.1 – 7.5.7, Albuquerque, New Mexico, U.S.A., November 8 – 9, 2000.
    [abstract] [pdf] [doc] [bibtex]
  48. A. E. Henninger, A. J. Gonzalez and M. Georgiopoulos, and R. F. DeMara, “Modeling Semi-Automated Forces with Neural Networks: Performance Improvement through a Modular Approach,” in Proceedings of the Ninth Conference on Computer Generated Forces and Behavioral Representation (CGF-BR’00), Orlando, Florida, U.S.A., May 16 – 18, 2000.
    [abstract] [pdf] [bibtex]
  49. B. S. Motlagh and R. F. DeMara, “A Scalable Replicated Concurrent-Read Architecture,” in Proceedings of the Fourteenth International Symposium on Computer and Information Sciences (ISCIS'99), Izmir, Turkey, October 18 – 20, 1999.
    [abstract] [pdf] [bibtex]
  50. R. F. DeMara and P. J. Wilder, “A Taxonomy of High Performance Computer Architectures for Uniform Treatment of Multiprocessor Designs,” in Proceedings of the 1999 American Association for Engineering Education Southeastern (ASEE-SE’99) Conference, pp. 1 – 9, Clemson, North Carolina, U.S.A., April 11 – 13, 1999.
    [abstract] [pdf] [doc] [bibtex]
  51. A. E. Henninger, W. Gerber, R. F. DeMara, M. Georgiopoulos, and A. J. Gonzalez, “Behavior Modeling Framework for Embedded Simulation,” in Proceedings of the 1998 Interservice/Industry Training, Simulation and Education Conference (I/ITSEC’98), Orlando, Florida, U.S.A., November 30 – December 3, 1998.
    [abstract] [pdf] [bibtex]
  52. Y. Ma and R. F. DeMara, “Localized Knowledge Representation Scheme for Parallel Processing,” in Proceedings of the Fourth Joint Conference on Information Sciences (JCIS’98), pp. 81 – 86, Research Triangle Park, North Carolina, U.S.A., October 24 – 28, 1998.
    [abstract] [pdf] [bibtex]
  53. R. F. DeMara, H. Zhu, and M. Poston, “Rate Adaptive Source Quench Congestion Avoidance Techniques,” in Proceedings of the 1998 International Symposium on Information Theory and Applications (ISITA’98), pp. 572 – 575, Mexico City, Mexico, October 14 – 16, 1998.
    [abstract] [pdf] [bibtex]
  54. A. J. Gonzalez, M. Georgiopoulos, R. F. DeMara, A. Henninger, and W. Gerber, “Automating the CGF Model Development and Refinement Process by Observing Expert Behavior in a Simulation,” in Proceedings of the Seventh Conference on Computer Generated Forces (CGF’98), Orlando, Florida, U.S.A., May 12 – 14, 1998.
    [abstract] [pdf] [bibtex]
  55. B. S. Motlagh and R. F. DeMara, “Memory Latency in Distributed Shared-Memory Multiprocessors,” in Proceedings of the 1998 IEEE Southeastcon Conference (Southeastcon’98), pp. 134 – 137, Orlando, Florida, U.S.A., April 24 – 26, 1998.
    [abstract] [pdf] [bibtex]
  56. P. J. Wilder, R. F. DeMara, and M. Costello, “Formal Student Presentations: Two views on One Methodology,” in Proceedings of the 1998 American Association for Engineering Education Southeast Section (ASEE-SE’98) Conference, pp. 198 – 200, Orlando, Florida, U.S.A., April 5 – 7, 1998.
    [abstract] [pdf] [bibtex]
  57. A. J. Gonzalez, R. F. DeMara, and M. Georgiopoulos, “Vehicle Model Generation and Optimization for Embedded Simulation,” in Proceedings of the 1998 Spring Simulation Interoperability Workshop (SIW’98), Orlando, Florida, U.S.A., March 9 – 13, 1998.
    [abstract] [pdf] [bibtex]
  58. H. Bahr, R. F. DeMara, and M. Georgiopoulos, “Integer-Encoded Massively Parallel Processing of Fast-Learning ARTMAP Networks,” in Proceedings of the 1997 SPIE AeroSense Symposium (AeroSense’97), pp. 678 – 689, Orlando, Florida, U.S.A., April 21 – 24, 1997.
    [abstract] [pdf] [bibtex]
  59. H. Bahr and R. F. DeMara, “A Concurrent Model Approach to Scaleable Distributed Interactive Simulation,” in Proceedings of the Fifteenth Workshop on the Interoperability of Distributed Interactive Simulation, pp. 215 – 222, Orlando, Florida, U.S.A., September 16 – 20, 1996.
    [abstract] [pdf] [bibtex]
  60. S. E. Crawford and R. F. DeMara, “Cache Coherence in Multiport Memory Architecture,” in Proceedings of the Second International Conference on Massively Parallel Computing Systems (MPCS’95), pp. 632 – 642, Ischia, Italy, May 2 – 6, 1995.
    [abstract] [pdf] [bibtex]
  61. R. F. DeMara, B. S. Motlagh, E. Lin, and S. Kuo, “Barrier Synchronization Techniques for Distributed Process Creation,” in Proceedings of the Eighth International Symposium on Parallel Processing (IPPS’94), pp. 597 – 603, Cancun, Mexico, April 26 – 29, 1994.
    [abstract] [pdf] [bibtex]
  62. R. N. Mercer, M. Ebel, and R. F. DeMara, “Pipelined Architecture for Computational Nanotechnology,” in Proceedings of the 1994 IEEE Southcon Conference (Southcon’94), pp. 314 – 319, Orlando, Florida, U.S.A., March 29 – 31, 1994.
    [abstract] [pdf] [bibtex]
  63. R. A. Cagle, R. B. Holl, and R. F. DeMara, “Multifunction Content Addressable Memory for Parallel Speech Understanding,” in Proceedings of the 1994 IEEE Southcon Conference (Southcon’94), pp. 320 – 325, Orlando, Florida, U.S.A., March 29 – 31, 1994.
    [abstract] [pdf] [bibtex]
  64. R. Mercer, M. Ebel, and R. F. DeMara, “Helical Boolean Logic Elements,” in Proceedings of the Third Foresight Conference on Molecular Nanotechnology, Palo Alto, California, U.S.A., October 14 – 16, 1993.
    [abstract] [pdf] [bibtex]
  65. J. D. Roberts, R. F. DeMara, G. Ellis, R. Hughey, R. Levinson, and C. Noshpitz, “AHP: Advanced Hardware for PIERCE,” in Proceedings of the Second International Workshop on PIERCE, pp. 26 – 29, Quebec, Canada, August 7, 1993.
    [abstract] [pdf] [bibtex]
  66. S. H. Chung, R. F. DeMara, and D. I. Moldovan, “PASS: a parallel speech understanding system,” in Proceedings of the Ninth IEEE Conference on AI for Applications (CAIA-93), pp. 136 – 142, Orlando, Florida, U.S.A., March 1 – 5, 1993.
    [abstract] [pdf] [bibtex]
  67. R. F. DeMara and H. Kitano, “Benchmarking Performance of Massively Parallel AI Architectures,” in Proceedings of the Fourth Symposium on the Frontiers of Massively Parallel Computation, pp. 517 – 520, McLean, Virginia, U.S.A., October 19 – 21, 1992.
    [abstract] [pdf] [bibtex]
  68. R. F. DeMara and D. I. Moldovan, “Marker-Passing on a Parallel Knowledge Processing Testbed,” in Proceedings of the First International Conference on Parallel and Distributed Information Systems (PDIS’91), pp. 180, Miami, Florida, U.S.A., December 4 – 6, 1991.
    [abstract] [pdf] [bibtex]
  69. R. F. DeMara and H. Kitano, “PACE Benchmark Set,” in Proceedings of the 1991 International Joint Conference on Artificial Intelligence (IJCAI’91) – Workshop on Parallel Processing for AI, pp. 517 – 520, Sydney, Australia, August 24 – 25, 1991.
    [abstract] [pdf] [bibtex]
  70. R. F. DeMara and D. I. Moldovan, “Performance Indices for Parallel Marker-Propagation,” in Proceedings of the 1991 International Conference on Parallel Processing (ICPP-91), pp. 658 – 659, St. Charles, Illinois, U.S.A., August 12 – 16, 1991.
    [abstract] [pdf] [bibtex]
  71. R. F. DeMara and D. I. Moldovan, “A DSP Architecture for Parallel AI Processing,” in Proceedings of the 1991 TMS320 Educators Conference, Houston, Texas, U.S.A., July 31 – August 2, 1991.
    [abstract] [pdf] [bibtex]
  72. R. F. DeMara and D. I. Moldovan, “The SNAP-1 Parallel AI Prototype,” in Proceedings of the Eighteenth Annual International Symposium on Computer Architecture (ISCA’91), pp. 2 - 11, Toronto, Ontario, Canada, May 27 - 30, 1991. Also appears in Computer Architecture News, Vol. 19, No. 3, pp. 2 - 11, May, 1991.
    [abstract] [pdf] [bibtex]
  73. R. F. DeMara and D. I. Moldovan, “Design of a Clustered Multiprocessor for Real-time Natural Language Understanding,” in Proceedings of the Fifth International Parallel Processing Symposium (IPPS’91), pp. 270 – 277, Anaheim, California, U.S.A., April 30 – May 2, 1991.
    [abstract] [pdf] [bibtex]
  74. R. F. DeMara, “Characterizing Marker-Propagation Mechanisms,” in Proceedings of the First Workshop on Abstract Machine Models for Highly Parallel Computers, pp. 77 – 82, Leeds, United Kingdom, March 25 – 27, 1991.
    [abstract] [pdf] [bibtex]
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